TPS-KU085-IE+ High Performance FPGA Platform

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System Application

• Gigabit Ethernet
  • Xilinx Vivado Tool Download FPGA Design File. (Include ILA)
  • TPS m-View management system for Self-Test and FPGA Peripheral Setting.
• USB2.0
  • Xilinx Vivado Tool Download FPGA Design File. (Include ILA)
  • TPS m-View management system for Self-Test and FPGA Peripheral Setting.

Features

Large Capacity & Scalable

• Up to 1088K System logic cells and 56.9Mb of internal memory(Block Ram).
• Small form factor. (276 × 174 mm)

Flexible & Powerful I/Os

• 462 HP I/O pins through 3 high-speed connectors(CON1~ CON3). HP I/O voltage can be adjusted to 1V,1.2V, 1.35V, 1.5V or 1.8V through runtime software in GUI or change Configuration file in SD Card with 3 status LEDs on-board to indicate I/O voltage.
• 16 Gigabit transceivers and 11 HP I/O pins through a high-speed connector(CON GTH) can run up to 12.5Gbps(GTH), HP I/O voltage can be adjusted to 1V,1.2V, 1.35V, 1.5V or 1.8V through runtime software in GUI or change Configuration file in SD Card with 3 status LEDs on-board to indicate I/O voltage.
• 102 HR I/O pins through a high-speed connector(CON HR) can run up to 12.5 Gbps(GTH), HR I/O voltage can be adjusted to1.2V, 1.35V, 1.5V, 1.8V, 2.5V or 3.3V through runtime software in GUI or change Configuration file in SD Card with 4 status LEDs on-board to indicate I/O voltage.
• Total I/O Pins = 473HP I/Os + 102 HR I/Os + 16 GTH .
• HP I/O Voltage Adjustment range: 0.95V ~ 1.85V, resolution: 50mV
• HR I/O Voltage Adjustment range: 1.15V ~ 3.4V, resolution: 50mV (1.15~3V), resolution:100mV(3.1~3.4V)

Clock Sources Management

• 4 global clocks to be selected from 
  • 1 programmable clock generator for 4 global clocks. (10-650MHz, 4 different frequencies)
  • Clock frequency can be adjusted through runtime software in GUI or change Configuration file in SD Card.
• 2 GTH/Ref clocks to be selected from 
  • 1 programmable clock generatorfor 2 GTH reference clocks. (10-650MHz, 2 different frequencies)
  • Clock frequency can be adjusted through runtime software in GUI or change Configuration file in SD Card.

Power Management

• 4 Group HP IO Connectors Power Adjustable. (3* HP IO Connectors + others HP IOs for GTH Connectors)
• Every HP Connector provide adjusted voltage power supply. (Each Current Driver Capacity 20A)
• 1 HR Connectors for a group provide adjusted voltage power supply. (Total Current Driver Capacity 20A)
• Independent provide VCC5V power supply for 5 IO Connectors shared. (Total Current Driver Capacity 20A)

High Performance

• Equal trace length for I/Os from same I/O connector.
• Speed Grade (External Loopback, through the Loopback Card)
  • LVDS Component Mode Performance
    • HP IO Connectors
    • LVDS TX DDR 1200 Mb/s.
    • LVDS RX DDR 1200 Mb/s.
  • HR IO Connectors
    • LVDS TX DDR 1000 Mb/s.
    • LVDS RX DDR 1000 Mb/s.
  • GTH Transceiver
    • (GTH Connector) 12.5 Gb/s.

High Reliability

• Screw-lock design to I/O connectors.
• Self-Tests – Isolate design issues from board issues conveniently with a software GUI.(TPS m-View management system)
• Monitoring of on-board voltage, current and temperature with a software GUI.(TPS m-View management system)
• Automatic shut-down upon detection of over-current, over-voltage or over-temperature.

Ease-of-Use

• Auto diagnosis of TPSIC detect loopback card.
• Multiple FPGA configuration options through Ethernet port, USB port, JTAG and micro SD card.
• Support KU085 FPGA 4 input/4 output GPIO for GUI Control.
• Virtual SWs for simple tasks such as changing a setting or indicating a condition .