TPS-VU19P-IDM+

TPS-VU19P-IDM+ High Performance FPGA Platform

Overview

The TPS-VU19P-ID+ High Performance FPGA Platform is the small form-factor, all-purpose, stand-alone system based on Xilinx’s Virtex UltraScale+ XCVU19P FPGA(XCVU19P-2FSVA3824E).
The system has 1280 general purpose I/Os and 16 GTY transceivers on 8 high-speed connectors.
Both HP I/O voltage can be adjustedto 1V, 1.2V, 1.35V, 1.5V, and 1.8V(Adjustment range: 0.95V ~ 1.85V, resolution: 50mV), it can through runtime software in GUI or change Configuration file in SD Card with 24 statusLEDs on-board to indicate I/O voltage.
Both HD I/O voltage can be adjusted to 1.2V, 1.35V, 1.5V,1.8V, 2.5V and 3.3V(Adjustment range: 1.15V ~ 3V, resolution: 50mV, 3V ~ 3.4V, resolution: 100mV), it can through runtime software in GUI or change Configuration file in SD Card with 4 status LEDs on-board to indicate I/O voltage.
On-board 2* DDR4 SO-DIMM socket supports up to 16GB memory, Speed 2400Mb/s (Use Xilinx MIG IP).
Utilizing TPS m-View management system technology, users can download design file into FPGA and Peripheral Setting remotely through Gigabit Ethernet and USB2.0.
Multiple FPGA configuration options through Ethernet port, USB port, JTAG and micro SD card.
Scalability with TPS-VU19P-ID+ High Performance FPGA Platform.
- Expand multi-platform with Bridge Card.
Gigabit Ethernet
- Xilinx Vivado Tool Download FPGA Design File. (Include ILA)
- TPS m-View management system for Self-Test and FPGA Peripheral Setting.
USB2.0
- Xilinx Vivado Tool Download FPGA Design File. (Include ILA)
- TPS m-View management system for Self-Test and FPGA Peripheral Setting.

Features

Large Capacity & Scalable

Up to 8,938K System logic cells and 165.9Mb of internal memory(Block Ram and Ultra Ram).
Small form factor. (400 × 250 mm)
On-board 2*DDR4 SO-DIMM socket supports up to 16GB memory, 2400Mb/s (Use Xilinx MIG IP).
Multiple Logic Modules can be conveniently connected together to expand capacity by interconnection modules.

Flexible & Powerful I/Os

1232 HP I/O pins through 8 high-speed connectors(CON1~ CON7). HP I/O voltage can be adjusted to 1V,1.2V, 1.35V, 1.5V or 1.8V through runtime software in GUI or change Configuration file in SD Card with 24 status LEDs on-board to indicate I/O voltage.
16 Gigabit transceivers and 48 HD I/O pins through 2 high-speed connector(CON9~CON10) can run up to 12.5Gbps(GTY), HD I/O voltage can be adjusted to1.2V,1.35V, 1.5V, 1.8V, 2.5V or 3.3V through runtime software in GUI or change Configuration file in SD Card with 4 status LEDs on-board to indicate I/O voltage.
Total I/O Pins = 1232 HP I/Os + 48 HD I/Os + 16 GTY + 274 HP I/Os for 2* On-board DDR4 SO-DIMM socket.
HP I/O Voltage Adjustment range: 0.95V ~ 1.85V, resolution: 50mV
HD I/O Voltage Adjustment range: 1.15V ~ 3.4V, resolution: 50mV (1.15~3V), resolution:100mV(3.1~3.4V)

Clock Sources Management

8 global clocks to be selected from
- 2 programmable clock generator for 8 global clocks. (10-650MHz, 8 different frequencies)
- Clock frequency can be adjusted through runtime software in GUI or change Configuration file in SD Card.
4 GTY/Ref clocks to be selected from
- 1 programmable clock generatorfor 4 GTY reference clocks. (10-650MHz, 4 different frequencies)
- Clock frequency can be adjusted through runtime software in GUI or change Configuration file in SD Card.

Power Management

9 Group IO Connectors Power Adjustable.(8 HP IO Connectors + 2 HD Connectors for a group)
Every HP Connector provide adjusted voltage power supply. (Total Current Driver Capacity 20A)
2 HD Connectors for a group provide adjusted voltage power supply. (Total Current Driver Capacity 20A)
Independent provide VCC5V power supply for 10 IO Connectors shared. (Total Current Driver Capacity 20A)

High Performance

Up to 250W of power for an FPGA.
On-board support of high-speed DDR4 memory(2400Mb/s，Use Xilinx MIG IP).
Equal trace length for I/Os from same I/O connector.
Speed Grade (External Loopback, through the Loopback Card)
- LVDS Component Mode Performance
  - HP IO Connectors : LVDS TX/RX DDR 1200 Mbps.
  - GTY Transceiver : 12.5 Gbps.

High Reliability

Screw Push-Pull design to I/O connectors.
Self-Tests – Isolate design issues from board issues conveniently with a software GUI.(TPS m-View management system)
Monitoring of on-board voltage, current and temperature with a software GUI.(TPS m-View management system)
Automatic shut-down upon detection of over-current, over-voltage or over-temperature.

Ease-of-Use

Auto diagnosis of TPSIC detect loopback card.
Multiple FPGA configuration options through Ethernet port, USB port, JTAG and micro SD card.
Support VU19P FPGA 4 input/4 output GPIO for GUI Control.
Virtual SWs for simple tasks such as changing a setting or indicating a condition .