TPS-VU9P-IE+ High Performance FPGA Platform
Overview
- The TPS-VU9P-IE+ High Performance FPGA Platform is the small form-factor, all-purpose, stand-alone system based on Xilinx’s Virtex UltraScale+ XCVU9P FPGA(XCVU9P-L2FSGD2104E).
- The system has 627 general purpose I/Os and 16 GTY transceivers on 5 high-speed connectors.
- Both HP I/O voltage can be adjustedto 1V, 1.2V, 1.35V, 1.5V, and 1.8V(Adjustment range: 0.95V ~ 1.85V, resolution: 50mV), it can through runtime software in GUI or change Configuration file in SD Card with 15 statusLEDs on-board to indicate I/O voltage.
- Utilizing TPS m-View management system technology, users can download design file into FPGA and Peripheral Setting remotely through Gigabit Ethernet and USB2.0.
- Multiple FPGA configuration options through Ethernet port, USB port, JTAG and micro SD card.
- Scalability with TPS-VU9P-IE+ High Performance FPGA Platform.
- Expand multi-platform with Bridge Card.
- Gigabit Ethernet
- Xilinx Vivado Tool Download FPGA Design File. (Include ILA)
- TPS m-View management system for Self-Test and FPGA Peripheral Setting.
- USB2.0
- Xilinx Vivado Tool Download FPGA Design File. (Include ILA)
- TPS m-View management system for Self-Test and FPGA Peripheral Setting.
Features
Large Capacity & Scalable
- Up to 2586K System logic cells and 354.9Mb of internal memory(Block Ram and Ultra Ram).
- Small form factor. (285 × 175 mm)
Flexible & Powerful I/Os
- 616 HP I/O pins through 4 high-speed connectors(CON1~ CON 4). HP I/O voltage can be adjusted to 1V,1.2V, 1.35V, 1.5V or 1.8V through runtime software in GUI or change Configuration file in SD Card with 3 status LEDs on-board to indicate I/O voltage.
- 16 Gigabit transceivers and 11 HP I/O pins through a high-speed connector(CON GTY) can run up to 16Gbps(GTY), HP I/O voltage can be adjusted to 1V,1.2V, 1.35V, 1.5V or 1.8V through runtime software in GUI or change Configuration file in SD Card with 3 status LEDs on-board to indicate I/O voltage.
- Total I/O Pins = 627HP I/Os + 16 GTY .
- HP I/O Voltage Adjustment range: 0.95V ~ 1.85V, resolution: 50mV
Clock Sources Management
- 4 global clocks to be selected from
- 1 programmable clock generator for 4 global clocks. (10-650MHz, 4 different frequencies)
- Clock frequency can be adjusted through runtime software in GUI or change Configuration file in SD Card.
- 2 GTY/Ref clocks to be selected from
- 1 programmable clock generatorfor 2 GTY reference clocks. (10-650MHz, 2 different frequencies)
- Clock frequency can be adjusted through runtime software in GUI or change Configuration file in SD Card.
Power Management
- 5 Group HP IO Connectors Power Adjustable. (4* HP IO Connectors + others HP IOs for GTY Connectors)
- Every HP Connector provide adjusted voltage power supply. (Each Current Driver Capacity 20A)
- Independent provide VCC5V power supply for 5 IO Connectors shared. (Total Current Driver Capacity 20A)
High Performance
- Up to 150W of power for an FPGA.
- Equal trace length for I/Os from same I/O connector.
- Speed Grade (External Loopback, through the Loopback Card)
- LVDS Component Mode Performance
- HP IO Connectors: LVDS TX DDR 1200 Mb/s. LVDS RX DDR 1200 Mb/s.
- GTY Transceiver: GTY Connector 16 Gb/s.
High Reliability
- Screw Push-Pull design to I/O connectors.
- Self-Tests – Isolate design issues from board issues conveniently with a software GUI.(TPS m-View management system)
- Monitoring of on-board voltage, current and temperature with a software GUI.(TPS m-View management system)
- Automatic shut-down upon detection of over-current, over-voltage or over-temperature.
Ease-of-Use
- Auto diagnosis of TPSIC detect loopback card.
- Multiple FPGA configuration options through Ethernet port, USB port, JTAG and micro SD card.
- Support VU9P FPGA 4 input/4 output GPIO for GUI Control.
- Virtual SWs for simple tasks such as changing a setting or indicating a condition .